1. Field of the Invention
The present invention relates to a variable length code decoding apparatus and a variable length code decoding method and, more particular, a variable length code decoding apparatus and a variable length code decoding method to decode a code string coded by using a defined set of variable length codes.
2. Related Art
In a moving image compression coding scheme such as MPEG-2, H. 264 or VC-1, compression coding is performed by using a defined set of variable length codes. Therefore, as one of basic constituent elements of a moving image decoding apparatus, a variable length code decoding apparatus is essential to decode a code string coded by using a defined set of variable length codes.
A conventional variable length code decoding apparatus uniquely determines a codeword length and a decoding value by using a variable length coding table (relationship between a bit string stored in a memory, a codeword and a decoding value) for a bit string stored in FIFO (First In First Out) memory. In this case, a load generated when a codeword length is output increases depending on the number of variable length coding tables. In particular, when the VC-1 scheme is used, the number of variable length coding tables is larger than that of the MPEG-2 scheme.
In contrast to this, in general, it is known that a plurality of memories each having the same storage content are arranged, and respective output destinations are distributed to distribute loads, so that a processing speed can be increased.
However, even though the method is simply applied to a FIFO memory of a variable length code decoding apparatus, the effectiveness of the increase in processing speed by distributing loads is disadvantageously reduced. The reason is because bit strings output from a plurality of FIFO memories return to the FIFO memories as codeword lengths through a variable length coding table. More specifically, even though loads generated on the variable length coding table is distributed by arranging the plurality of FIFO memories, increase in the number of FIFO memories (destinations of codewords output from the variable length coding table) causes increase of a load generated when the codeword lengths are output (Japanese Patent application (laid-Open) No. 8-205142).